1. Field of Invention
The present invention relates to a method of manufacturing a non-volatile memory cell. More particularly, the present invention relates to a method of manufacturing a single-cell with two bits type of non-volatile memory cell, which is applicable to a flash memory cell and a silicon-oxide-nitride-oxide-silicon (SONOS) memory cell.
2. Description of Related Art
Recently, the demands on non-volatile memory devices increase with due to the popularity of portable electronic products. Because of the maturity of flash memory manufacturing techniques and the demands of portable electronic products, memory cell array and memory cells thereof having high storage density and high storage capacity become very important.
Generally, a flash memory is manufactured by forming a tunneling oxide layer, a conductive layer and a dielectric layer sequentially. Then, the layers mentioned above are defined to form a floating gate and an inter-gate dielectric layer. Thereafter, a control gate is formed on the inter-gate dielectric layer over the floating gate.
However, when defects are present in the tunneling oxide layer underneath the polysilicon-floating gate, the reliability of devices is affected by the leakage current resulted from the defects. To resolve the leakage current issue of the devices, a charge-trapping layer is used to replace the polysilicon-floating gate. Since the charge-trapping layer is a silicon nitride layer, the non-volatile memory formed by oxide-nitride-oxide (ONO) is known as a SONOS memory.
Due to the charge trapping function of the silicon nitride layer, electrons injected into the silicon nitride layer are not distributed uniformly therein, i.e. the electrons are only localized at a certain area of the silicon nitride layer. Therefore, when a SONOS memory is programmed, electrons are locally stored at the channel region over the source/drain region. In the memory mentioned above, four storage states can be written in a memory cell by varying voltages applied to the gate and the source/drain region. In other words, in this type of flash memory, two bits are stored in one cell.
When programming such a SONOS memory, hot electrons injected into the charge-trapping layer are distributed according to the injection energy. However, with the trends of high integration, data with two bits stored in the same memory cell will influence each other so as to cause a programming error. Therefore, the reliability of the memory is affected significantly.